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Verifying Termination and Error-Freedom of Logic Programs with block Declarations

Jan-Georg Smaus
INRIA-Roquencourt
BP 105,
78153 Le Chesnay Cedex,
France
jan.smaus@inria.fr

Patricia M. Hill
School of Computing
The University of Leeds
Leeds LS2 9JT
England

Andy King
Computing Laboratory
The University of Kent at Canterbury
Canterbury CT2 7NF
England

Abstract:

We present verification methods for logic programs with delay declarations. The verified properties are termination and freedom from errors related to built-ins. Concerning termination, we present two approaches. The first approach tries to eliminate the well-known problem of speculative output bindings. The second approach is based on identifying the predicates for which the textual position of an atom using this predicate is irrelevant with respect to termination. Three features are distinctive of this work: it allows for predicates to be used in several modes; it shows that block declarations, which are a very simple delay construct, are sufficient to ensure the desired properties; it takes the selection rule into account, assuming it to be as in most Prolog implementations. The methods can be used to verify existing programs and assist in writing new programs.