[PPL-devel] [GIT] ppl/ppl(master): Avoid implicit conversion reducing size of underlying type.

[Enea Zaffanella]

Module: ppl/ppl
Branch: master
Commit: ba6a021a1ac94a6d97e6600e1bc4e710861160d3
URL:    http://www.cs.unipr.it/git/gitweb.cgi?p=ppl/ppl.git;a=commit;h=ba6a021a1ac94a6d97e6600e1bc4e710861160d3

Author: Enea Zaffanella <zaffanella at cs.unipr.it>
Date:   Thu Nov  3 19:32:14 2011 +0100

Avoid implicit conversion reducing size of underlying type.
Detected by ECLAIR service utypflag.

---

 src/Bit_Row.cc |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/Bit_Row.cc b/src/Bit_Row.cc
index 3d2a386..4b4fa1e 100644
--- a/src/Bit_Row.cc
+++ b/src/Bit_Row.cc
@@ -313,7 +313,7 @@ PPL::Bit_Row::union_helper(const Bit_Row& y, const Bit_Row& z) {
   mp_size_t z_size = z.vec->_mp_size;
   PPL_ASSERT(y_size <= z_size);
   PPL_ASSERT(vec->_mp_alloc >= z_size);
-  vec->_mp_size = z_size;
+  vec->_mp_size = z.vec->_mp_size;
   mp_srcptr yp = y.vec->_mp_d;
   mp_srcptr zp = z.vec->_mp_d;
   mp_ptr p = vec->_mp_d;